信息安全研究 ›› 2020, Vol. 6 ›› Issue (2): 145-150.

• 学术论文 • 上一篇    下一篇

万兆IPSec协议芯片关键技术研究

桂祚勤,崔广财,林存花,陈浩涓   

  1. 江南计算技术研究所
  • 收稿日期:2020-02-08 出版日期:2020-02-10 发布日期:2020-02-08
  • 通讯作者: 桂祚勤
  • 作者简介:桂祚勤 硕士,高级工程师,主要研究方向为信息安全. . guizq56@126.com 崔广财 硕士研究生,工程师,主要研究方向为信息安全. 林存花 硕士,工程师,主要研究方向为信息安全. 陈浩涓 硕士,工程师,主要研究方向为信息安全.

The Key Techniques Research of 10Gbps IPSec Protocol Chip

  • Received:2020-02-08 Online:2020-02-10 Published:2020-02-08

摘要: 随着网络安全问题日益严重,IPSec安全协议得到了更广泛的应用. 采用软件实现IPSec安全协议具有安全性较低、性能不高等特点,而纯硬件实现IPSec安全协议具有灵活性较差、并行性不高等特点. 因此,在深入研究IPSec安全协议的基础上,提出一种采用专用指令集处理器结合硬件加速来实现IPSec安全协议的架构,并采用40nm CMOS工艺对该架构进行了实现验证,该芯片的IPSec处理性能可达到10Gbps.

关键词: 网络安全, IPSec, 专用指令集处理器, 抗重放, 硬件查找算法

Abstract: With the increasing problem of network security, IPSec protocol has been widely used in many areas. Software implementation of IPSec security protocol has the characteristics of poor security, poor platform adaptability and low performance. Hardware implementation of IPSec security protocol is characterized by poor flexibility and low parallelism. Therefore, this paper based on the analyses of IPSec protocol, proposes a method of implementing of IPSec protocol in combination with ASIP and software. The design of 10Gbps IPSec protocol chip using 40nm CMOS process for hardware implantation which performance up to 10Gbps.

Key words: network security, IPSec, ASIP, anti_duplication, hardware lookup